The present invention relates to the problem of controlling the effects of noise that may be generated by high performance driver circuits (drivers). These drivers are generally used in conjunction with logic devices on semiconductor chips that are built using very large scale integration (VLSI) techniques.
In prior art VLSI devices, the noise that was generated, for example due to simultaneous switching of drivers, is difficult to control, due to factors such as the high number of output drivers available, the large data bus widths in use, and the fast driver performance.
In a typical prior art arrangement, the data pin of a driver is connected to receive switching signals from a number of different logic paths. Each of these logic paths is generally of a different physical length. Thus, the prior art drivers may switch multiple times during a machine cycle, before they settle down to a final state. This multiple switching is an added source of switching noise.
The prior art has attempted to solve this noise problem by, for example, using more expensive and complex chip packaging technologies, modifying the driver circuits in an attempt to control the amount of noise that was generated when the driver switched, and by the use of circuit delays in the logic paths that connect to the inputs of the drivers, so as to separate the switching times of the various drivers.
The prior art has been mainly concerned with the noise that is coupled between adjacent signal lines, and with the inductive bounce that occurs in the chip's power distribution network, since it is known that these effects can cause false switching of associated driver circuits.
In the prior art, the chip designer has generally been forced to accept additional product cost by way of more expensive packaging, or decreased performance due to slower driver speed or longer logic paths.
Prior art attempts to control the effects of noise include the following.
U.S. Pat. No. 4,587,445 discloses a data output circuit that is formed in an IC package (not shown). The invention of this patent seeks to eliminate noise currents that flow to parasitic capacitors (C1 - CN of FIG. 1) through the power line source for the circuit. This is done by the use of a majority circuit 30 (FIG. 2) that compares the input data (at T1 - TN) to the previous data (as latched in FFs 22-1 - 22-N). Depending upon this comparison, the input data is inverted or not as it passes through the circuit. Inverted data is restored to its original input state at the circuit's output (R1 -RN) by operation of a notation signal generator (FF 38). As a result, the voltage excursions associated with the circuit's parasitic capacitance is said to be minimized.
U.S. Pat. No. 4,613,771 discloses a rectangular shaped integrated circuit die (10 of FIG. 1) that includes input pads (11) located on opposite parallel sides of the die, and output pads (14) that are located on the other two opposite side of the die. Switching noise, normally caused by parasitic capacitance and resistance, is said to be reduced by a critical arrangement of three power buses (20-1, 20-2 and 20-3) that are connected to certain chip components, more specifically to the output driver transistors (56), to the logic gates (12), and to certain resistors (50) that are associated with the drivers.
U.S. Pat. No. 4,609,834 discloses logic gates (11) and output driver circuits (30) that are constructed on a semiconductor chip. It is recognized that parasitic inductance and capacitance generates noise when a drive circuit switches, and that this noise signal is coupled to conductors that are not switching, producing undesirable effects. In order to compensate for the effect of the noise signal, a noise reducing module (50) is provided. This module generates a control signal on a bus that is common to all of the driver circuits. The control signal is of such a shape and polarity as to cancel the noise signal.
While the prior art has to some extent reduced the effect of driver switching noise, this reduction has generally been accomplished only by the use of more expensive and complex packaging.